Physics & Spacearticle2026-09-02

Integrated Thermal Noise Analysis of Ferroelectric-Doped Dual-Metal-Gate GaN HEMTs for High-Frequency Low-Noise Systems

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Abstract

Abstract Accurate noise prediction is essential for reliable high-frequency semiconductor device design. This work presents an integrated analytical framework for evaluating thermal noise in a ferroelectric (Fe)-doped, dual-metal-gate (DMG) AlN/AlGaN/GaN HEMT, based on the Cappy noise model and explicitly accounting for the influence of gate length on transconductance. Closed-form expressions are derived for the minimum noise factor (Fmin), noise conductance (Gn), output noise, and integrated noise, and are evaluated for device parameters Tox = 4.5 nm, L1 = 200 nm and L2 = 300 nm. The dual-gate architecture is shown to suppress thermal noise more effectively than a single virtual-gate (SVG) design because the split work-function gates strengthen electrostatic control of the channel and raise transconductance, which in turn lowers both the output and integrated noise. At Cg1 = 4 mF and Cg2 = 4.41 mF, the intersection of the integrated-noise and transconductance curves occurs at (2.3974, 2.4701 dB), compared with (2.4107, 2.4914 dB) for the conventional output-noise formulation, an improvement of about 27% in predicted noise at the highest gate bias considered (Vgs = 8.548 V), confirming that the integrated approach yields a tighter and more physically consistent noise estimate. The proposed Fe-doped DMG AlN/AlGaN/GaN HEMT, together with the integrated Cappy-based noise model, therefore offers both improved noise prediction accuracy and genuinely reduced noise levels, and the trends obtained agree with TCAD simulations and with previously reported experimental and modeling studies, indicating strong potential for high-frequency, low-noise circuit applications.

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View paper (DOI)OpenAlexSemiconductorsPublished 2026-09-02

Authors: V. Karutharaja, N. B. Balamurugan, M. Hemalatha, M. Suguna

Institutions: Madurai Medical College