Where a Common-Mode Choke Moves the Carrier Resonance: Cpv-Resolved Sizing for Two-Stage H5 Inverters

Abstract

Transformerless H5 inverters serve the 5 kW residential photovoltaic (PV) segment, but their common-mode (CM) leakage current follows the rain and humidity-driven parasitic capacitance Cpv — which, to our knowledge, no prior work connects to a resonance-safe choke size. We propose a CM- equivalent-circuit sizing map over choke inductance and Cpv, verified cell- by-cell in settled runs against a second ngspice implementation. The peaks are R-limited: 1.44 V RMS drive implies ≈0.8 Ω effective loop resistance, and a resistance sweep puts the 300 mA crossing at R ≈ 7 Ω. Relocation, not removal: the unchoked loop resonates at 118.2 nF (1.81 A); the 2 mH choke moves that peak to 67.8 nF (1.76 A); the 3.5 mH recipe moves it to 48.5 nF (1.78 A) while holding the 330–550 nF band SAFE (worst 0.72 predicted, 0.83 measured). For 0–5 mH the resonance cannot leave 36–118 nF, inside the sourced range — so damping is mandatory unless a site's Cpv stays above ≈150 nF; in the two-stage stack the choke moves total leakage only ~2%. AVOID/SAFE agreement is 10/10 over 10 decidable cells; ngspice 6/7; screen 7/8. Absolute values are edge-rate dependent; claims rest on ratios, signs, and thresholds.