Volume VII: Sovereign and Global South Pathways: Selective Participation, Open Standards and Crypto-Agility under Dual Clocks

Abstract

This seventh volume examines how the dual-clock framing, modular cryogenic stack, cryo-CMOS control and quantum-memory specifications developed in preceding volumes can be used by resource-constrained and Global South jurisdictions. It argues that full domestic construction of large fault-tolerant machines is neither necessary nor optimal. Instead, selective participation in cryogenic and control supply chains, adoption of open standards for memory and interconnect interfaces, and early crypto-agility programmes allow such jurisdictions to reduce dependency risk and harvest-now-decrypt-later exposure while the architectural and migration clocks continue to run. The analysis maps the residual-risk indicators of Volume VI onto practical policy levers that do not require waiting for a definitive quantum-advantage date.