Integration of high-κ oxide on 2D semiconductors with carbon-dot monolayer assembly as van der Waals interfacial layer
Abstract
The atomically smooth surfaces of two-dimensional (2D) nanomaterials minimise scattering-induced carrier-transport degradation. However, this same attribute poses a major challenge for integrating 2D materials with high-quality dielectrics at sub-nanometre equivalent oxide thickness (EOT) through direct growth. Here we show that atomically thin carbon dots with diameters of a few nanometres assemble into a closely packed monolayer on 2D materials without hybridizing with the underneath graphene or molybdenum disulfide (MoS2) channels. This atomically thin assembly forms a van der Waals interfacial layer that enables deposition of ultrathin high-κ oxides to afford a smooth, thermally stable hybrid dielectric with an EOT down to 0.6 ± 0.1 nm, leakage current density below 10−4 A·cm−2, and a breakdown field of 28 MV·cm−1. Leveraging this approach, we fabricate top-gated MoS2 transistors with a subthreshold swing approaching 60 mV·dec−1, hysteresis below 30 mV, near-zero threshold voltage (VT) for enhancement-mode operation, and excellent bias-stress stability with VT drift under 25 mV, allowing integration into logic circuits operating at a low drive voltage of 0.5 V. The integration of high-κ dielectric materials with 2D semiconductors remains an important challenge for the industrialization of 2D electronics. Here, the authors report the application of a carbon-dot monolayer assembly to facilitate the deposition of high-κ HfO2 on monolayer graphene and MoS2, enabling the fabrication of high-performance transistors.
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Authors: Sunny Wong, Fufei An, Yu Wu, Viet Hung Pham, Yanxiao Li, Robert L. Thompson, Junseok Lee, Kaijun Yin, Hanyu Hou, Yuan Gao, Jian‐Min Zuo, Congjun Wang, Christopher Matranga, Qing Ping Cao
Institutions: Monash University, University of Illinois Urbana-Champaign, Argonne National Laboratory, National Energy Technology Laboratory, Center for Nanoscale Materials