Domain-Adapted Surrogate Modeling for Ripple Optimization in Integrated Buck Converters

Abstract

Designing high-performance DC-DC converters using integrated Power Management ICs (PMICs) is often constrained by the black-box nature of internal compensation networks, rendering traditional analytical design methods imprecise. This paper proposes a Domain-Adapted Surrogate Modeling framework for the automated synthesis of circuit parameters in synchronous Buck converters, specifically targeting output voltage ripple optimization. By leveraging a transformer-based generative architecture optimized via Low-Rank Adaptation (LoRA), the model captures complex, nonlinear couplings between external passive components and internal control loops that empirical formulas overlook. Unlike computationally expensive global search algorithms, this data-driven approach directly synthesizes design configurations that satisfy multi-objective constraints for voltage ripple and transient response. Validation on an integrated DC-DC converter demonstrates a 30.000% and 32.800% reduction in steady-state output ripple compared to the baseline and Bayesian optimized designs, respectively. Furthermore, the proposed approach achieves a 47.222% faster startup than the baseline, while maintaining competitive transient performance with a 5.556% improvement in startup time over the Bayesian benchmark. These results establish the efficacy of generative surrogate models in solving specific power integrity optimization problems with limited data.