Virtual self-excited induction generator based grid-forming control with inherent current limiting through virtual demagnetization and GWO-DE optimized adaptive capacitance
Abstract
Abstract This paper presents the Virtual Self-Excited Induction Generator (V-SEIG), a grid-forming control concept for power electronic converters that, to the best of the authors’ knowledge, constitutes the first reported implementation of the complete self-excited induction generator dynamic model as the generative core of a grid-forming converter control algorithm in the low-inertia grid context. The fourth-order d – q axis model of a squirrel-cage induction machine, including the nonlinear magnetizing characteristic, slip-dependent electromagnetic torque, self-excitation dynamics from a virtual residual flux, and an adaptive virtual capacitor bank, is solved within the converter control loop at 10 kHz. Three structural features distinguish the V-SEIG from synchronous-machine-based virtual generators: inherent current limiting through saturation-driven virtual demagnetization without external protection logic; natural voltage bounding through magnetic saturation; and a software-implemented adaptive virtual capacitance bounded between 30 and 80 $$\mu$$ F, with PID adaptation gains and underlying virtual machine parameters jointly tuned by a Grey Wolf Optimizer–Differential Evolution (GWO-DE) hybrid metaheuristic. The present study is a simulation-based proof of concept: the concept is evaluated through MATLAB/Simulink simulations across eight operating scenarios, anchored to a 5.5 kW, 4-pole, 415 V, 50 Hz reference machine and incorporating a switching-level converter model together with a representative measurement, noise, and quantization pipeline. Voltage builds up from a 0.01 Wb virtual residual flux to rated value within 0.65 s. Within this simulation scope, comparative benchmarking against a current-limited grid-forming VSG equipped with a threshold virtual impedance scheme indicates a 48.4% reduction in peak fault current ( $$1.47 \pm 0.02$$ pu vs. $$2.85 \pm 0.04$$ pu), driven by a collapse of the virtual magnetizing inductance from 254 mH to 92 mH within 20 ms of fault inception; 35.6% faster voltage recovery (85 ms vs. 132 ms); an 89.2% improvement in islanded voltage regulation under nonlinear loading ( $$4.45\% \rightarrow 0.48\%$$ ); a voltage THD of $$1.83\% \pm 0.05\%$$ against $$3.95\% \pm 0.07\%$$ (a 53.7% reduction); a 50% load-step voltage dip of 18.0 V vs. 27.5 V with recovery in 120 ms vs. 248 ms; and slip-based parallel power sharing with $$1.8 \pm 0.3\%$$ error and a 70.8% lower circulating current (0.35 A vs. 1.20 A rms). Voltage regulation is retained below $$1.2\%$$ and the dominant-mode damping ratio above 0.18 across short-circuit ratios from 1.5 to 10. The GWO-DE optimizer converges to an objective value of $$0.110 \pm 0.004$$ within $$122 \pm 6$$ iterations over 30 independent runs, and robustness to $$\pm 20\%$$ parameter uncertainty is confirmed across 200 Monte Carlo realizations with a worst-case peak fault current of 1.68 pu, below the 2.0 pu device limit. The control law executes within $$1.52\%$$ of the 10 kHz control period on a representative digital signal processor.
// Source
Authors: Mrinal Kanti Rajak, Meenakshi Mukund Pawar, Ingudam Chitrasen Meitei, Rajen Pudur
Institutions: National Institute of Technology Arunachal Pradesh