Data-driven cycle time optimisation in semiconductor manufacturing using machine learning and heuristic search algorithms

Abstract

In semiconductor wafer fabrication, cycle time strongly affects throughput and cost, yet is hard to control because bottlenecks shift across tools over time. This paper presents a hybrid framework that combines machine learning (ML) and heuristic optimisation to minimise the imposed Delta Cycle Time (ΔCT) in a wafer fabrication plant. Multiple ML models were trained to predict ΔCT from each tool's Key Performance Indicators (KPIs), and Genetic Algorithm (GA), Particle Swarm Optimisation (PSO), and Sequential Quadratic Programming (SQP) were used to optimise these indicators against the trained model. The Random Forest model demonstrated greater robustness than the other Machine Learning models, achieving a best-case per-tool root mean square error (RMSE) of 0.029, although the cross-validated RMSE varies widely across tools (median ≈ 0.49). The framework was evaluated on proprietary data from a Seagate Technology wafer fabrication facility comprising 96 tools. The Random Forest with the Genetic Algorithm achieved the greatest improvement, reducing average ΔCT from +0.276 to −0.392 days (a 0.668-day mean reduction), improving all 96 tools. PSO was comparable at −0.347 days, a 0.623 day reduction, again improving all 96 tools; SQP was more conservative at +0.091 days, a 0.184 day reduction, improving 77 of 96 tools. In some tools, baseline ΔCT is close to zero, so absolute day reductions are a more appropriate indicator than percentage reductions. This framework converts production logs into tool-specific KPI recommendations, showing where cycle-time reductions are achievable.